JPS61131668U - - Google Patents
Info
- Publication number
- JPS61131668U JPS61131668U JP1476585U JP1476585U JPS61131668U JP S61131668 U JPS61131668 U JP S61131668U JP 1476585 U JP1476585 U JP 1476585U JP 1476585 U JP1476585 U JP 1476585U JP S61131668 U JPS61131668 U JP S61131668U
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- display mode
- switch
- gate
- decimal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000005259 measurement Methods 0.000 claims 2
- 238000000034 method Methods 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 3
Landscapes
- Measuring Frequencies, Analyzing Spectra (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1476585U JPS61131668U (en]) | 1985-02-05 | 1985-02-05 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1476585U JPS61131668U (en]) | 1985-02-05 | 1985-02-05 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS61131668U true JPS61131668U (en]) | 1986-08-16 |
Family
ID=30499989
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1476585U Pending JPS61131668U (en]) | 1985-02-05 | 1985-02-05 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS61131668U (en]) |
-
1985
- 1985-02-05 JP JP1476585U patent/JPS61131668U/ja active Pending